JordanViknar
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  • France
  • https://github.com/JordanViknar

  • Welcome to my personal profile on Plexus ! You'll find here my currently active personal projects.

    For my other projects, check the organizations in this Forgejo instance.

  • Joined on 2025-06-24
Overview Repositories
5
 Projects Packages Public activity Starred repositories
8
JordanViknar synced commits to feat/compiler at JV-Group-Projects/RedHDL from mirror 2026-01-08 13:31:09 +01:00
209871a5d0 fix: Disallow tracks to be placed before the one of the destination's pin
b3e8dfee44 fix: Wrong relay choice when there's multiple
14aa9e43af refactor: Group golden tests
3b92db1f79 feat: Add relay between pins separated by 1 or more layers
289ed98862 misc: Colorize nets according to their starting pin
Compare 6 commits »
JordanViknar synced commits to feat/compiler at JV-Group-Projects/RedHDL from mirror 2026-01-07 13:06:07 +01:00
d9de7d47f4 fix: Topologycally sort nets to avoid conflict
7adac4e1c9 feat: Add xor operator
Compare 2 commits »
JordanViknar synced and deleted reference refs/tags/feat/typer at JV-Group-Projects/RedHDL from mirror 2026-01-06 12:36:07 +01:00
JordanViknar synced commits to feat/compiler at JV-Group-Projects/RedHDL from mirror 2026-01-06 12:36:07 +01:00
1a801863b2 feat: Add colorized ASCII-art circuit representation
ff5b783cec fix: Correctly handle net cycles
4432332266 fix: Do not create nets for nodes with no output
Compare 3 commits »
JordanViknar synced commits to feat/compiler at JV-Group-Projects/RedHDL from mirror 2025-12-30 18:06:32 +01:00
567fb13081 fix: Route channels while keeping in mind some gates have multiple input pins
JordanViknar synced commits to feat/compiler at JV-Group-Projects/RedHDL from mirror 2025-12-23 23:06:32 +01:00
23d1878257 feat: Add channel routing
JordanViknar synced commits to feat/compiler at JV-Group-Projects/RedHDL from mirror 2025-12-22 14:36:31 +01:00
c8043c3707 dev: Add channel routing
3a55359f85 feat: Add graph topological sorting
a16fe61eca feat: Add basic port optimization
Compare 3 commits »
JordanViknar synced commits to feat/compiler at JV-Group-Projects/RedHDL from mirror 2025-12-19 13:16:32 +01:00
edb562caff chore: Remove debug print
4a3ce45323 refactor: Move expansion/flattening and simplification to ir package
a8124b2755 feat: Add graph building from simplified component
Compare 3 commits »
JordanViknar synced commits to feat/compiler at JV-Group-Projects/RedHDL from mirror 2025-12-18 21:06:31 +01:00
b75f770749 feat: Add component simplification
620e3ac2a6 feat: Add component expanding
Compare 2 commits »
JordanViknar synced new reference feat/compiler to JV-Group-Projects/RedHDL from mirror 2025-12-18 12:56:31 +01:00
JordanViknar synced commits to main at JV-Group-Projects/RedHDL from mirror 2025-12-18 12:56:31 +01:00
JordanViknar synced commits to feat/compiler at JV-Group-Projects/RedHDL from mirror 2025-12-18 12:56:31 +01:00
JordanViknar synced commits to main at JV-Group-Projects/RedHDL from mirror 2025-12-18 04:46:31 +01:00
5f61bbce0c dev: Add graph building
JordanViknar synced commits to main at JV-Group-Projects/RedHDL from mirror 2025-12-17 12:26:31 +01:00
42e3874a75
 feat: Add typechecking (#2)
JordanViknar synced commits to feat/typer at JV-Group-Projects/RedHDL from mirror 2025-11-07 21:51:18 +01:00
308f1862ec feat: Add typechecking
JordanViknar synced new reference feat/typer to JV-Group-Projects/RedHDL from mirror 2025-11-07 13:51:16 +01:00
JordanViknar synced commits to feat/typer at JV-Group-Projects/RedHDL from mirror 2025-11-07 13:51:16 +01:00
JordanViknar synced commits to main at JV-Group-Projects/RedHDL from mirror 2025-11-06 13:21:17 +01:00
c958ff9fe5 test: Add golden tests
JordanViknar synced commits to main at JV-Group-Projects/Arduino-Clanker from mirror 2025-10-24 20:53:20 +02:00
f1da63b898 feat: Last changes
JordanViknar synced and deleted reference refs/tags/feat/jordan-improvements at JV-Group-Projects/Arduino-Clanker from mirror 2025-10-24 20:53:20 +02:00